\section{Background and Related Work}

Figure~\ref{technology} illustrates the fundamentals of the most promising emerging memory technologies to be investigated in our project, namely, the Phase-Change RAM (PCRAM), the Magnetic RAM (MRAM) based on Spin-Torque Transfer RAM (STT-RAM), the resistive RAM (RRAM), and the memristor. In this section, we will briefly describe the physical mechanisms of these emerging NVM technologies and summarize the previous related researches.

\subsection{Phase-Change RAM (PCRAM)}
PCRAM technology is based on a chalcogenide alloy (typically, Ge$_2$--Sb$_2$--Te$_5$, GST) material, which is similar to those commonly used in optical storage means (compact discs and digital versatile discs)~\cite{Bedeschi09}. The data storage capability is achieved from the resistance differences between an amorphous (high-resistance) and a crystalline (low-resistance) phase of the chalcogenide-based material as shown in Figure~\ref{technology}. In SET operation, the phase change material is crystallized by applying an electrical pulse that heats a significant portion of the cell above its crystallization temperature. In RESET operation, a larger electrical current is applied and then abruptly cut off in order to melt and then quench the material, leaving it in the amorphous state~\cite{burr:scm08}.

PCRAM has shown to offer compatible integration with CMOS technology, fast speed, and good endurance~\cite{Oh06,Pirovano03,Lai03}. Compared to MRAM, PCRAM is even denser with an approximate cell area of $6\sim12F^2$~\cite{ITRS07}, where $F$ is technology feature size. In addition, phase change material has a key advantage of the excellent scalability within current CMOS fabrication methodology~\cite{Cho05,Kim06,Lai01,Pirovano03,Raoux08}, which enables the continuous density improvement~\cite{Nirschl07,Chen07-iedm,Im08}.

PCRAM device models have been developed from the point of views of reliability~\cite{Ielmini07}, low-frequency noise~\cite{Fantini08}, and statistical analysis~\cite{Mantegazza07}. However, these models are dedicated to material and fabrication, so they cannot be directly utilized by circuit designers. Many PCRAM prototypes have been demonstrated in the past years by companies like Hitachi~\cite{Hanzawa07}, Samsung~\cite{Lee07-isscc}, STMicroelectronics~\cite{Bedeschi08, Sandre10}, and Numonyx~\cite{Villa10}. The maximum capacities achieved for single-level cell and multi-level cell are 1Gb and 256Mb~\cite{Villa10,Lee07-isscc}, respectively. However, to be more competitive to DRAM and Flash memory, PCRAM need further improvement on endurance and density.

\begin{figure}
\centering
%\vspace{-10pt}
\includegraphics[width=1\textwidth]{./figure/1_technology_half.pdf}
\vspace{-10pt}
\caption{\textbf{Overview of Some Emerging Non-volatile Memory Technologies,} including Phase-Change RAM (PCRAM), Magnetic RAM (MRAM), resistive RAM (RRAM), and memristor. }
\label{technology}
\vspace{-10pt}
\end{figure}

\subsection{MRAM based on Spin-Torque Transfer RAM (STT-RAM)}
STT-RAM is a new type of Magnetic RAM (MRAM)~\cite{ITRS07,Hosomi05,MRAM:TTO+06,MRAM:ZBM+06,mram:ibm:maffitt}, which features non-volatility, fast writing/reading speed (\textless 10ns), high programming endurance (\textgreater 10$^{15}$cycles) and zero standby power~\cite{ITRS07}. The storage capability or programmability of MRAM arises from magnetic tunneling junction (MTJ), in which a thin tunneling dielectric, e.g., MgO., is sandwiched by two ferromagnetic layers. One ferromagnetic layer (``pinned layer'') is designed to have its magnetization pinned, while the magnetization of the other layer (``free layer'') can be flipped by a write event. An MTJ has a low (high) resistance if the magnetizations of the free layer and the pinned layer are parallel (anti-parallel). In first-generation MRAM design, the magnetization of free layer is changed by the current-induced magnetic field~\cite{Motoyoshi04,Ha04}. In STT-RAM, a new write mechanism called ``polarization-current-induced magnetization switching'' is introduced -- the magnetization of free layer is flipped by the electrical current directly. Since the current required to switch an MTJ resistance state is proportional to MTJ area, STT-RAM is believed to have a better scaling property than the first-generation MRAM~\cite{Hosomi05,Kawahara07,MRAM:TTO+06,Diao07,Salahuddin07,Beach08,Kishi08}. Because of the fast access and soft-error resistance, MRAM potentially could be the next-generation on-chip cache or memory.

Continuous efforts on MRAM process development have been taken to improve yield~\cite{Miura07}, reduce power consumption~\cite{Durlam03}, and increase density~\cite{Lou08}. MRAM prototypes have been demonstrated recently by various companies and research groups~\cite{Hosomi05,Kawahara07,Nebashi09,Motoyoshi04,Andre05,Kawahara08}. Commercial MRAM products have been launched by companies like Everspin (which is a spin-off from Freescale to expedite the technology commercialization in 2008) and NEC.

We have been dedicated on developing STT-RAM models for circuit designers. A dynamic MTJ model with a more accurate (transient) description on MTJ resistance switching was proposed, which has been proved to reduce 20\% pessimism in write time~\cite{Chen08}. We also have analyzed the failure probability of STT-RAM cells due to parameter variations and developed a yield estimation model~\cite{Li09}.

\subsection{Resistive RAM (RRAM) and Memristor}
In a RRAM cell, the data is stored as two (single-level cell, or SLC) or more (multi-level cell, or MLC) resistance states of the resistive switch device. Resistive switching in transition metal oxides was discovered in thin NiO film decades ago~\cite{Gibbons64}. From then, a large variety of metal-oxide materials have been verified to have resistive switching characteristics, including TiO$_2$~\cite{Fujimoto06}, NiO$_x$~\cite{Jung07}, Cr-doped SrTiO$_3$~\cite{Janousch07}, PCMO~\cite{Liu00}, and CMO~\cite{Hsu07} etc. Based on the storage mechanisms, RRAM materials can be cataloged as filament-based, interface-based, programmable-metallization-cell (PMC), etc. Based on the electrical property of resistive switching, RRAM devices can be divided into two types: unipolar switching and bipolar switching.

Programmable-metallization-cell (PMC)~\cite{Kozicki05} is a promising bipolar switching technology. Its switching mechanism can be briefly explained as forming or breaking the small metallic ``nanowire'' by moving the metal ions between two sold metal electrodes. Filament-based RRAM is a typical example of unipolar switching~\cite{Inoue} that has been widely investigated. The insulating material between two electrodes can be made conducting through a hopping or tunneling conduction path after the application of a sufficiently high voltage. The data storage could be achieved by breaking (RESET) or reconnecting (SET) the conducting path. Such switching mechanism can in fact be explained with the fourth circuit element, the memristor~\cite{Chua71,Tour08,Strukov08}.

Memristor was predicted by  Chua in 1971, based on the completeness of circuit theory~\cite{Chua71}. Memristance is a function of charge, which depends upon the historic behavior of the current (or voltage) profile~\cite{Chua76,Strukov08}. In 2008, the researchers at HP reported the first real device of a memristor in a solid-state thin film two-terminal device by moving the doping front along the device~\cite{Tour08}. Afterwards, magnetic technology provided the other possible methods to build a memristive system~\cite{Pershin08,Wang09}. Due to its unique historic characteristic, memristor has very broad applications including nonvolatile memory, signal processing, control and learning system etc~\cite{Chen09}.

Many companies are working on technology developments and chip designs of RRAM and memristor-based memory, including Fujitsu, Sharp, HP lab, IMEC, Unity Semiconductor Corp., etc.~\cite{Johnson10}. The main efforts on RRAM research devote to material and process~\cite{Fujimoto06,Jung07,Janousch07,Liu00,Hsu07} and circuit design issues, such as power-supply monitoring~\cite{Balasubramanian09} and timing control~\cite{Kwak09}. Unity Semiconductor Corp. has been processing 64Kb and 64Mb products and expects to demonstrate 64Gb RRAM chips in 2010~\cite{LaPedus09}. HP Labs also plan to unveil RRAM prototype chips based on memristor with crossbar arrays soon~\cite{Johnson08}.


\begin{figure}
\centering
\vspace{-10pt}
\includegraphics[width=0.9\textwidth]{./figure/2_table.pdf}
\vspace{-10pt}
\caption{The comparison of various memory technologies~\cite{ITRS07}.}
\label{table}
\vspace{-10pt}
\end{figure}

\paragraph{Summary.}
Figure~\ref{table} illustrates the comparison of emerging memory technologies -- PCRAM, MRAM (STT-RAM), RRAM and Memristor -- against the traditional main-stream SRAM, DRAM, and NAND-based Flash memory~\cite{ITRS07}. Note that both CMOS-compatible embedded PCRAM (Hitachi and STMicro)~\cite{Hanzawa07,PRAM:ST2004} and embedded MRAM (NEC)~\cite{MRAM:NEC09} have been demonstrated, paving the way of integrating these NVMs to the traditional memory hierarchies. In addition, the emerging 3D integration technologies~\cite{xie:jetcs06,Xie:dac08} enables cost-effective integration of these NVMs with CMOS logic circuits. With all the NVM technology advances in recent years, it is anticipated that the emerging NVM technologies will break important ground and move closer to market in the near future (``Non-volatile memory goes commercial", EEtimes, 12/02/2009).


